Pure Storage FlashArray-Implementation-Specialist Pure Certified FlashArray Implementation Specialist (FAIS) Exam Exam Practice Test

ActiveCluster, Pure Storage's synchronous replication solution for zero RPO/RTO, currently supports a maximum of2 arraysin a single active-active relationship (often referred to as a "Pod").

Architecture:The ActiveCluster architecture is strictly designed as a 1:1 synchronous pairing between two FlashArrays. This allows both arrays to serve reads and writes for the same volumes simultaneously.

Stretched Clustering:The limit of two arrays ensures that the synchronous acknowledgement (ACK) process for writes remains performant and manageable over the inter-site link. Adding a third array to the synchronous loop would exponentially increase write latency and complexity.

3-Data Center Configurations:While you can configure a "3DC" architecture, this involves one ActiveCluster pair (2 arrays) replicating asynchronously to a third, standalone array (ActiveCluster + ActiveDR or Async). However, the synchronous ActiveCluster domain itself never exceeds 2 arrays.

To view the currently configured Network Time Protocol (NTP) servers on a FlashArray, the correct command ispurearray list --ntpserver.

Command Hierarchy:While NTP is a networking function, in the Purity CLI object model, time synchronization is considered a global array attribute rather than a specific interface setting. Therefore, it falls under the purearray command namespace.

Usage:Running purearray list --ntpserver returns a list of the IP addresses or FQDNs of the time servers the array is currently using to sync its system clock.

Invalid Options:

purenetwork list (Option B) displays IP interface configurations (IPs, subnets, gateways) but does not list service-level pointers like NTP.

puredns list (Option A) is strictly for DNS nameservers and suffix configurations.

Importance:Verifying NTP is critical for log timestamp accuracy, ActiveCluster mediation, and Kerberos authentication.

When adding a second DirectFlash Shelf to aFlashArray//XL, the connectivity utilizesPCIe Slot 6(in conjunction with Slot 0).

FlashArray//XL Architecture:The //XL chassis distributes its backend NVMe-oF (100GbE RoCE) connectivity across two dedicated PCIe slots to ensure redundancy and maximum bandwidth. As established in hardware diagrams,Slot 0(lower riser) andSlot 6(upper riser) are the designated slots for the 2-port 100GbE backend cards.

Expansion Logic:

First Shelf:Typically connects to Port 0 of the card in Slot 0 and Port 0 of the card in Slot 6 (providing HA).

Second Shelf:Connects to the remaining ports (Port 1) on thesame cardsin Slot 0 and Slot 6.

Exam Context:In the context of "which slot must be used" for the expansion or specifically highlighting the secondary backend slot distinct from the primary host slots,Slot 6is the correct identifier for the backend expansion capability on the //XL. Options A (Slot 0) is the primary, but C (Slot 6) is often the specific answer required to demonstrate knowledge of the //XL's unique split-riser backend layout compared to legacy arrays.

On aFlashArray//XR2 or //XR3, if a dedicatedPCIe SAS HBA(Host Bus Adapter) is required for external shelf connectivity (expanding beyond the onboard SAS ports), it must be installed inSlot 1.

The PCIe slot prioritization on the FlashArray//X R2/R3 controllers is strictly defined to ensure optimal performance and lane distribution:

Slot 0:Reserved primarily for frontend Host I/O cards (Fibre Channel or iSCSI/Ethernet). This slot usually connects to CPU 0 and offers high bandwidth for host traffic.

Slot 1:Designated as the primary expansion slot forbackend connectivity(SAS cards for expansion shelves) or secondary Host I/O if no SAS expansion is needed.

Slot 2:On smaller models (X10/X20), this is often theonlyhost I/O slot, but on the larger X50/X70/X90 chassis, it is used for additional Host I/O.

If an Implementation Engineer installs a SAS card in Slot 0, the system may fail to recognize the shelves correctly or may flag a configuration error, as the Purity software expects backend expansion traffic to route through the bus associated with Slot 1. Therefore, for SAS expansion cards, Slot 1 is the mandatory location.

TheFlashArray//X70 (R2/R3)andFlashArray//X90 (R2/R3)require1600W Power Supply Units (PSUs).

Pure Storage equips its FlashArray//X chassis with different power supply capacities based on the compute load of the installed controllers:

Performance Tier (X70/X90):These models utilize high-core-count Intel Xeon processors and support the maximum density of NVMe DirectFlash Modules. To support the peak power draw of these components while maintaining N+1 redundancy (where one PSU can support the entire load), the1600Wunits are mandatory.

Entry/Mid Tier (X10/X20/X50):Lower-end models often ship with1000Wor1200WPSUs (though X50 often uses 1600W in later revisions or specific configs).

Identification:Implementation Engineers can identify these PSUs by the label on the rear handle (often color-coded or explicitly marked "1600W"). Installing an X90 controller into a chassis with older 1200W PSUs (e.g., during an improper upgrade attempt) would likely trigger a hardware alert or prevent the controllers from booting due to insufficient power budget.

On aFlashArray//XR2 or //XR3controller equipped with an optional Ethernet Mezzanine (EMEZZ) card, the additional ports are enumerated asETH6, ETH7, ETH8, and ETH9.

The port numbering logic on these controllers follows a strict sequence:

ETH0 and ETH1:Fixed onboard 1GbE Management ports.

ETH2 and ETH3:Fixed onboard 10/25GbE ports (often used for replication or iSCSI).

ETH4 and ETH5:Reserved or used by the first PCIe slot expansion (if populated with Ethernet).

ETH6 through ETH9:Assigned to theEthernet Mezzanine (EMEZZ)slot.

The EMEZZ is a specific internal slot distinct from the standard PCIe risers. When populated, the Purity operating system reserves the eth6–eth9 block for these interfaces. Options B and C are incorrect because they describe port ranges that would typically be assigned to PCIe expansion cards in Slot 1 or Slot 2 (e.g., eth10+), or they simply do not align with the hardcoded enumeration logic of the R2/R3 controller architecture. Correct identification of these interfaces is critical for configuring link aggregation (LACP) or assigning iSCSI IPs during the initial setup.

TheFlashArray//XR2 and //XR3(representing the FlashArray//X generation) utilize a standardized3U(3 Rack Units) chassis form factor.

This 3U chassis is the foundation for the majority of the FlashArray//X line, including the //X10, //X20, //X50, //X70, and //X90 models. It is designed to be compact while providing sufficient airflow and space for the dual controllers, two data packs (up to 20 DirectFlash Modules), and power/cooling infrastructure.

Dimensions:Approximately 5.12 inches (13 cm) in height.

Rack Layout:Implementation Engineers must reserve 3U of contiguous space for the base controller chassis. If expansion shelves are included, they typically require an additional 2U each (for SAS or NVMe shelves).

Option B (4U) is not a standard height for current Pure Storage arrays. Option C (5U) refers to theFlashArray//XL, a larger, performance-optimized platform designed for maximum scale and density, which uses a significantly taller chassis to accommodate more expansion slots and power components. Therefore, for the specified R2/R3 X-series, 3U is the correct height.

Verifying the physical SAS or RoCE cabling topology is a mandatory step before initializing a new shelf. The FlashArray provides a specific engineering-level Python script for this purpose:storage_view.py enclosures.

This script queries the backend fabric and visualizes the connection topology between the controllers and the shelves.

It confirms that both controllers (CT0 and CT1) have redundant paths to the shelf (IOM0 and IOM1).

It verifies that the shelf is visible on the expected ports.

It checks for cabling errors, such as "crossed" cables (connecting a primary port to a secondary port incorrectly) or missing links.

Using this tool ensures that the physical layer is perfectly redundant before data is ever placed on the shelf.

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Calculating rack space requirements is a fundamental pre-installation task. The FlashArray//XL series features a larger chassis than the //X series to accommodate its increased power, cooling, and DirectFlash capabilities.

TheFlashArray//XL Chassisitself occupies5 Rack Units (5U).

A standardDirectFlash Shelf (DFS)occupies2 Rack Units (2U).

In this scenario, the customer is installing one //XL chassis and two DFS shelves.

Calculation:

1 x //XL Chassis (5U) = 5U

2 x DirectFlash Shelves (2U each) = 4U

Total = 9U.

Therefore, the Implementation Engineer must verify that there are at least 9 contiguous Rack Units available in the cabinet. Standard best practice also suggests placing the shelves immediately above or below the controller chassis to accommodate the 3-meter maximum cable length for the backend fabric, so these 9U should ideally be in a single block.

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Consistent with previous FlashArray generations, theFlashArray//XR4adheres to the standard port designation for administrative connectivity.

ETH0is the primary port enabled for themanagement serviceby default.

When an Implementation Engineer first connects to a new //XR4 controller to perform the initial IP configuration, they utilizeETH0(and oftenETH1for redundancy).

These ports are physically labeled for management and are logically separated from the data and replication traffic in the default configuration.

ETH2andETH3are typically reserved or defaulted for replication traffic, while higher-numbered ports (like ETH10+) are used for host I/O or backend shelf connectivity on the R4 platform. Using ETH0 ensures immediate access to the Purity GUI and CLI without requiring custom port reconfiguration.

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If physical drives need to be relocated within the array (e.g., rebalancing shelves or moving packs to specific slots to match the target configuration) as part of anXFORM (Data-in-Place) upgrade, this task should be completedafter the upgrade is completed.

Risk Management:The primary objective during the upgrade window is to successfully transition the controllers and software to the new generation (e.g., SAS to NVMe, or //M to //X) while maintaining data availability. Introducing unnecessary physical changes—like moving drives between slots—during the active controller swap adds variables and risk to the critical path.

Procedure:The standard workflow involves:

Perform the Controller Upgrade (XFORM).

Verify the new system is stable, healthy, and handling I/O correctly.

Post-Upgrade:Once the system is stable, the Implementation Engineer performs the physical drive relocation (if required) to optimize the layout or consolidate shelves. This ensures that if any issues arise from the drive movement, they are isolated from the controller upgrade process, making troubleshooting significantly easier and safer.

When installing thefirst DirectFlash Shelf (DFS)on aFlashArray//XR2 or //XR3utilizing the onboard or default mezzanine connectivity, the correct ports to use areETH6 and ETH9.

Hardware Layout:The FlashArray//XR2 and //XR3 utilize a specificEthernet Mezzanine (EMEZZ)slot for backend connectivity to NVMe-oF shelves. This card typically enumerates its ports as ETH6 through ETH9 (a 4-port configuration).

Cabling Rule:To maximize physical separation and ensure redundancy across the internal ASIC lanes of the mezzanine card, standard cabling procedures for thefirstshelf dictate using the outer ports:ETH6(Port 0) andETH9(Port 3).

Redundancy:This configuration (Port 0 and Port 3) is preferred over using adjacent ports (like 6 and 7) to reduce the risk of a single lane cluster failure affecting both connections to the shelf. The second shelf, if added later, would typically utilize the remaining ports (ETH7 and ETH8).

To initiate a Purity Operating Environment (OE) software upgrade from the Command Line Interface (CLI), the correct command ispureinstall.

pureinstall: This command manages the upgrade workflow. It typically takes an image file (ISO) as an argument or downloads it from the repository, unpacks it, performs pre-flight checks, and then applies the update to the controllers in a non-disruptive rolling fashion.

purereboot is used to restart a controller or the array but does not install software.

puresetup is used for the initial configuration of network settings and array names, not for software updates.

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For aDark Sitecustomer (where Remote Assist and PhoneHome are disabled), the appropriate next step before performing a shelf evacuation is touse the evac_checks script.

Risk Mitigation:Evacuating a shelf is a resource-intensive operation that permanently removes physical capacity from the system. In a connected environment, Pure Support runs remote diagnostics to verify the array has enough free space and system resources to handle the evacuation safely.

Dark Site Procedure:Since Support cannot log in remotely, the Implementation Engineer must manually run the evac_checks python script (typically loaded via USB or available in the Purity toolkit). This script performs the equivalent validation: checking effectively used capacity, dedup ratios, and system load to predict if the remaining drives can absorb the data from Shelf 01 without filling the array to 100% or causing performance degradation. Relying solely on a generic percentage (Option B or C) is dangerous because it doesn't account for data reduction overhead or specific RAID overheads.

The correct action is torefer to the “Recommended DFS Versions for Purity Releases” Knowledge Base (KB) articleand, if necessary, upgrade the Purity software on the FlashArray (which updates the DFS firmware).

Compatibility:DirectFlash Shelves (DFS) run specific firmware that must be compatible with the Purity operating system running on the array controllers. If a new shelf is shipped with very recent firmware, or an old shelf is added to a new array, there may be a mismatch.

Best Practice:The "Recommended DFS Versions" KB is the definitive source of truth. The engineer must verify if the shipped Purity version supports the specific hardware revision of the shelf.

Procedure:If an upgrade is required, the engineer updates Purity on the array. Since the DFS firmware is bundled within the Purity release, upgrading the array (Option A) effectively stages the update for the shelf. Once the shelf is attached (or if attached during the upgrade), Purity automatically applies the correct firmware to the DFS modules. Skipping this check (Option B) or blindly upgrading without cross-referencing the KB (Option C) risks connectivity issues or unrecognized capacity.

When performing a controller upgrade (Non-Disruptive Upgrade) from an //X50R3 to an //X50R4, the specific hardware configuration of the source array dictates the target bill of materials. The presence ofSAS drivesin the chassis indicates that the source is a legacy or transitional configuration, as the standard //X R4 platform is optimized for end-to-end NVMe (DirectFlash).

However, the question asks for the specific controller SKU required. In Pure Storage nomenclature for upgrades, the standard controller replacement part is typically the base model code, hereFLASHARRAY//XC50 R4.

The "XC" designation often refers to the controller component itself in upgrade kits. While special considerations apply to SAS media (which are usually phased out or require specific handling during R4 upgrades since R4 natively drops legacy SAS support on the motherboard), thecontrollerpart number itself remains the standard R4 SKU (Option C). Options like "SE" or "NS" (often denoting specific encryption or networking variants) are not the standard identifiers for the base controller upgrade in this context.

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A valid transfer path forre-using iSCSI cardsduring a controller upgrade is from aFlashArray//XR2 to a FlashArray//XR3(Option A).

Hardware Continuity:The FlashArray//XR2 and //XR3 generations share a high degree of physical component compatibility, particularly regarding PCIe form factors and supported interface cards.

Upgrade Workflow:When performing an "Intra-Series" upgrade (refreshing just the controllers from R2 to R3 to gain CPU performance), the existing I/O cards (Fibre Channel or iSCSI) from the R2 chassis can typically be transferred directly into the new R3 controllers.

Legacy Limitations:Migrating cards from a much olderFlashArray//M(Option B or C) is generally restricted. The //M series often used older generation PCIe cards or different form factors (like onboard risers) that are not validated or physically compatible with the modern PCIe slots found in the //X series. Therefore, for //M to //X upgrades, new I/O cards are usually required, whereas R2 > R3 supports reuse.

Data evacuation from a shelf is a sensitive background process where data is migrated off specific physical media to free it for removal. While the purearray evacuate command initiates the data movement, the finalization of the process—specifically the logical removal of the shelf object from the system configuration to allow for safe physical disconnection—often requires engineering-level commands or verification.

Therefore, before Pure Storage Support can log in to run these specific completion scripts or verification checks, the Implementation Engineer mustEnable Remote Assist (RA).

Remote Assist creates a secure, outbound SSH tunnel that allows Support to access the array remotely.

Without RA enabled, Support cannot connect to the array to execute the necessary puredrive or internal maintenance commands to mark the shelf as "vacated" and safe to unplug.

Powering off the shelf (Option B) before this step could result in data loss or an array outage if the system still believes data resides there.

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On a newFlashArray//XR4installation, the Implementation Engineer must run thecobalt_check.pyscript before executing puresetup newarray.

The FlashArray//XR4 represents a significant hardware architectural shift (internally codenamed or associated with the "Cobalt" platform generation). This platform introduces new PCIe layouts, NVMe backplanes, and controller components that require specific validation beyond the standard legacy checks. The cobalt_check.py script is a specialized hardware diagnostic tool pre-loaded on the manufacturing image of //XR4 controllers.

Its purpose is to verify that the specific hardware components of the R4 platform—such as the status of the internal NVMe interconnects, the correct population of the chassis, and the health of the new controller mainboard—are functioning within strict tolerances. Running this check ensures that the physical layer is 100% healthy before the Purity operating system attempts to initialize the database and claim the storage media. Option A (pureboot list) checks boot versions but not hardware health, and Option C (purehw list) is a general command that might not catch the specific low-level architectural issues the cobalt_check.py script is designed to identify on this specific generation.

Validating multipath I/O balance is a critical post-configuration step. The FlashArray CLI provides a specific monitoring tool for this purpose under the purehost command suite.

purehost monitor --balanceis the correct command.

monitor: This keyword initiates a real-time display of performance metrics (IOPS, bandwidth, latency).

--balance: This flag breaks down the metricsper initiator(per HBA/path) for the specified host(s).

The output allows the engineer to see if I/O is flowing evenly across all paths. If one path shows 0 IOPS while others are active, it indicates a zoning, cabling, or multipathing configuration issue that must be resolved to ensure high availability.

TheFlashArray//XLcurrently supports a maximum of2 DirectFlash Shelves (DFS).

The FlashArray//XL is a high-density, performance-optimized platform housed in a 5U chassis.

Rack Unit Math:According to the FlashArray//XL specifications and site planning guide, the system supports a maximum configuration footprint of11 Rack Units (11U).

The base controller chassis occupies5U.

Each DirectFlash Shelf occupies3U.

Therefore: 5U (Base) + 3U (Shelf 1) + 3U (Shelf 2) =11U.

Capacity:Because the //XL chassis itself holds 40 DirectFlash Modules (compared to 20 in a standard //X), and each shelf holds 28 modules, a fully populated system with two shelves provides nearly 100 drives of capacity (40 + 28 + 28 = 96 drives). This massive density reduces the need for "daisy-chaining" large numbers of shelves like legacy SAS architectures. Adding a third shelf would push the total height to 14U, exceeding the current platform definition.

To performparallel evacuation of multiple SAS shelves, the FlashArray must be runningPurity//FA 6.0or higher.

Prior to Purity version 6.x, the shelf evacuation process (used during capacity consolidation or shelf retirement) was a serialized operation. An Implementation Engineer had to issue the evacuation command for one shelf, wait for all data to move to other storage within the array, and physically remove that shelf before starting the process for the next one. This could be time-consuming for large clusters of legacy SAS shelves.

With the release of Purity//FA 6.0, Pure Storage introduced significant enhancements to data mobility and background operational efficiency, including the ability to issue evacuation commands for multiple external shelves simultaneously. The system's intelligent scheduler manages the I/O bandwidth to ensure that the parallel data movement does not impact frontend host performance. While having sufficient free space (Option C) is logically necessary to hold the evacuated data, the specificfunctional capabilityto trigger concurrent evacuations is a software feature tied strictly to the Purity 6.x code base. Option B is irrelevant to the software capability of the array.

To complete the Non-Disruptive Upgrade (NDU) from an//X70R2to an//X90R3using a fully shipped array, the Implementation Engineer must extract and use theControllers and NVRAM modules.

Stateless Architecture:The FlashArray upgrade philosophy allows the chassis and data drives (Data Packs) to remain in place while the compute (controllers) and cache (NVRAM) are swapped.

Component Compatibility:

Controllers:The X90R3 controllers provide the upgraded CPU/performance required.

NVRAM:The NVRAM modules (located in the chassis front or rear slots depending on generation, but logically paired with controller performance) often differ between generations (R2 vs. R3) and performance tiers (70 vs. 90). The X70R2 NVRAM modules are typically not compatible with X90R3 controllers. Therefore, the engineermustswap the NVRAM modules along with the controllers to ensure the write cache is recognized.

Power Supplies:Both the X70R2 and X90R3 utilize the same high-capacity1600W Power Supply Units. Unless the existing PSUs are faulty, they do not technicallyneedto be swapped for the system to function, making "Controller and NVRAM" the precise minimum requirement for the logic upgrade.

To determine the specific model of a replacement controller while in the puresetup or manufacturing shell (before the controller has joined the cluster), the correct command ishwconfig --model.

During a controller replacement procedure, the engineer often connects to the new controller via serial or a temporary IP. At this stage, the full Purity CLI (and thus purearray list) may not be fully available or relevant because the controller is in a "setup" or "unconfigured" state.

hwconfig: This is a lower-level utility used to read the Field Replaceable Unit (FRU) data directly from the hardware VPD (Vital Product Data).

--model: This flag specifically filters the output to display the model string (e.g., FA-X50R3-CT0). Verifying this string is a critical safety step to ensure the replacement hardware matches the existing cluster node before attempting the software join process (puresetup replace).

FlashArrays require outbound HTTPS connectivity to reach Pure1 for log uploads, phone home, and remote assist. In many enterprise environments, direct internet access is blocked, and traffic must be routed through an HTTP/HTTPS proxy.

To configure this setting in Purity via the CLI, the correct command ispurearray setattr --proxyfollowed by the full proxy URL (including protocol and port). The setattr (set attribute) subcommand is the standard method for modifying array-wide configuration parameters like the array name, idle timeout, and proxy settings. The other command variations (puresetup proxy or purearray configure) are incorrect syntax for this specific operation. This configuration is often a critical step during the "Pre-Flight" or initial setup phase to ensure the array can "phone home" immediately upon deployment.

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On standard 3-Rack Unit (3RU) FlashArray models (such as the FlashArray//X50, //X70, and //X90 series), the rear of the controller chassis features onboard 10GbE or 25GbE Ethernet ports. Pure Storage adheres to a strict convention for the default assignment of these ports to simplify deployment and troubleshooting.

ETH0 and ETH1are invariably reserved and configured forManagementtraffic. These are used to access the GUI, CLI, and for the array to communicate with Pure1.

ETH2 and ETH3are the designated default ports forReplicationtraffic. When an Implementation Engineer configures async or sync replication, Purity will default to looking for connectivity on these interfaces unless explicitly reconfigured. This separation ensures that heavy data replication traffic does not contend with management traffic, maintaining administrative access even during periods of high bandwidth utilization for replication. Implementation Engineers must ensure these specific physical ports are cabled to the replication network switches during installation.

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The output "Ping successful with CCM" is a specific success message returned by the puresupport test or purearray test connectivity checks.CCMstands forCloud Connection Manager, which is the internal service or endpoint responsible for mediating the secure connection between the local FlashArray and thePure1cloud management platform.

When an Implementation Engineer sees this message, it confirms that the array can successfully resolve and reach the Pure1 infrastructure over the internet (specifically the pure1.purestorage.com or associated regional endpoints). This validates that:

DNS is functioning correctly (resolving the CCM hostname).

Firewall rules are permitting outbound HTTPS (port 443) traffic.

The array's management interface is routing correctly.

This connection is vital for "Phone Home" logs, Remote Assist sessions, and fleet management via the Pure1 mobile app or dashboard. It is distinct from the Fusion Fleet Coordinator (which manages fleet logic) and the cross-controller interconnect (which is internal hardware communication).

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To verify the history and transmission status of Phonehome log bundles, the correct command ispurearray phonehome --list.

Before starting a controller upgrade (NDU), it is mandatory to ensure that the array can successfully transmit diagnostic data to Pure Storage. This allows Support to review the "pre-flight" checks and ensures that if an issue occurs during the upgrade, logs will be available for triage.

Usage:Running purearray phonehome --list displays a table of recent log bundles generated by the system.

Verification:The Engineer must look at the Status column for the most recent entries. A status of"uploaded"confirms that the array has successfully connected to the Pure Storage cloud and transferred the data. If the status is "queued" or "failed," the upgrade should not proceed until network connectivity (firewall/proxy) is resolved. Options A and C are incorrect CLI syntax for this specific verification task.

Hardware Non-Disruptive Upgrades (HWNDU) rely strictly on the array being in a fully healthy state before the process begins. The validate-array-health check is designed to gate the upgrade if any component that provides redundancy or data integrity is compromised. NVRAM (Non-Volatile Random Access Memory) modules are critical components in the FlashArray architecture; they store in-flight write data to ensure it is persistent before being destaged to flash.

A "Code 60" alert specifically points to a hardware issue with an NVRAM module. While the //X70 model indeed has redundancy (often using multiple NVRAM modules), proceeding with an upgrade while one is degraded puts the array at risk. During an NDU, controllers reboot and failover; running on reduced redundancy during these critical operations is not supported and is blocked by the health checks.

The correct first step for an Implementation Engineer is to attempt toreseat the unhealthy NVRAM module. Often, connection issues or transient seating faults can trigger these alerts. After reseating, the engineer must run the health check again to confirm the module status has returned to "healthy." If the module remains unhealthy after reseating, it must be replaced before the upgrade can proceed. You cannot simply disable it or ignore it, as the upgrade script will likely refuse to continue to protect data integrity.

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For the FlashArray//X50 R2 and R3 models, the default Fibre Channel (FC) configuration utilizes a4-port PCIe Fibre Channel card installed in Slot 0.

The hardware architecture of the FlashArray//X series differentiates slot usage based on the model controller chassis.

FlashArray//X10 and //X20:These lower-end models utilizeSlot 2for host connectivity (Fibre Channel or iSCSI) because Slots 0 and 1 are typically reserved or occupied by onboard controllers/mezzanine cards. The standard card for these models is often a 2-port card.

FlashArray//X50, //X70, and //X90:These mid-to-high-range models feature a different PCIe bus layout.Slot 0is the primary designated slot for Host I/O connectivity. To support the higher performance capabilities and port density requirements of the X50, Pure Storage defaults to4-portFC cards (typically 16Gb or 32Gb).

Therefore, identifying the model number is crucial. Since the question specifies theX50(R2/R3), the correct placement is Slot 0, and the correct card type is the 4-port model. Option A is incorrect because the 2-port card is not the standard default for the performance-tier X50. Option B describes the configuration for an X20, not an X50.

Proper airflow and thermal management are critical for the reliability of high-density storage arrays. FlashArray chassis are designed with specific airflow baffles and cooling zones that rely on the drive bays being populated in a specific order.

When installing a new FlashArray with a single data pack (typically 10 drives), the Implementation Engineer must install the DirectFlash Modulesstarting in bay 0, filling from left to right.

Bay 0is typically the leftmost slot (when facing the front of the array).

Filling slots 0–9 ensures that the first "cooling zone" is properly pressurized, forcing air through the populated modules and the chassis midplane correctly.

Leaving gaps (e.g., installing in slots 10–19 while 0–9 are empty) can disrupt the airflow path, potentially leading to hotspots or inefficient cooling for the controllers behind the backplane.

Additionally, the software enumeration of drives often expects contiguous population starting from the lowest index for logical clarity, though cooling is the primary physical constraint.

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FlashArray controllers operate in an Active/Active high-availability cluster. Each controller (CT0 and CT1) has its own physical IP address for hardware-level management. However, Purity configures aVirtual IP (VIP)that floats between the two controllers.

TheVirtual management IPis the recommended address for all administrative access, including the GUI, CLI, and API integrations. Using the VIP ensuresHigh Availability (HA)for management sessions. If an Implementation Engineer were to log in directly to CT0's IP and CT0 subsequently rebooted (e.g., during an NDU or failure), the management session would be disconnected.

By contrast, the VIP automatically fails over to the surviving controller (CT1) in the event of a disruption, allowing the management session (and the GUI) to remain accessible. This abstraction layer simplifies administration, as the user does not need to know which controller is currently "primary" for management tasks. Direct controller IPs are typically reserved for specific hardware troubleshooting steps where accessing a specific node is required.

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Pure Storage DirectFlash Shelves (DFS) are designed with high-efficiency, enterprise-grade power supply units (PSUs). These PSUs are "auto-ranging," meaning they can accept a wide range of input voltages, typically from roughly 90V to 264V AC.

While data centers often prefer 208V-240V power sources for better efficiency (less heat loss and lower amperage draw for the same wattage), the hardware isfully validated and supported to operate on standard 110V/120V circuits. There is no "temporary only" restriction or hardware lockout that prevents operation on 120V.

Therefore, if the customer's high-voltage PDUs are full, the Implementation Engineer can safely connect the DirectFlash Shelf to the available 120V outlets. The shelf will function normally, provided the circuit has sufficient amperage capacity (amps) to handle the slightly higher current draw that results from using a lower voltage. This configuration is supported for the entire service life of the shelf.

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Complex upgrades that involve both removing old capacity (evacuation) and replacing controllers (hardware NDU) require a "checkpoint" with Pure Storage Support to ensure data safety.

The correct procedure dictates contacting supportafter removing the fully evacuated drives but before proceeding with the hardware NDU.

Why?Once the old drives are physically removed, the array's configuration state has changed. Support needs to verify that the evacuation was 100% successful, that no stale objects or pointers to the removed drives remain in the database, and that the system is fully healthy and redundant.

Proceeding directly into a controller reboot (NDU) without this verification could lead to issues if the array still "thinks" it needs the removed drives, potentially causing a boot failure or data unavailability during the controller failover.

To expand a FlashArray//X10 from a5/5(fully populated chassis with two 5TB equivalent packs) to an11/11(two 11TB equivalent packs) configuration, the correct action is toinstall a swing shelf with loan capacity.

The Constraint:The "5/5" notation implies the chassis slots are already occupied by the existing media. Since the customer isreplacingthe existing packs with larger ones (Capacity Consolidation) rather than just adding new ones, the engineer needs a place to put the data during the swap.

Why Swing Shelf:The FlashArray//X10 chassis has limited slots. You cannot simply pull a pack (Option A) if the remaining pack doesn't have enough free space to hold all the data (which is typical in upgrade scenarios). ASwing Shelf(temporary external SAS or NVMe shelf provided by Pure) is attached to the array. The data is evacuated from the internal drives to this shelf. Once the internal slots are empty, the new 11TB packs are installed. The data is then moved back from the shelf to the new packs, and the shelf is removed.

In a Non-Disruptive Upgrade (NDU), ensuring that the host is correctly multipathed and balancing I/O across all paths is critical before taking a controller down. If a host is only using paths to the controller about to be rebooted (CT0, for example), taking that controller offline would cause an outage.

The commandiobalance --sampletime 30(or its wrapper purehost monitor --balance) is the standard tool used during the upgrade procedure to validate this state.

iobalance: This script samples the I/O throughput on all ports for a specified duration (e.g., 30 seconds).

It analyzes the distribution of I/O. If it detects that I/O is heavily skewed or missing entirely on the "secondary" paths (the ones that will survive the reboot), it flags a warning.

This allows the Implementation Engineer to pause and remediate the host multipathing configuration (e.g., fixing a bad cable or zoning issue) before proceeding with the controller removal, ensuring the NDU remains truly non-disruptive.

The FlashArray//XL platform features a split-chassis design with a unique PCIe bus layout compared to the standard //X series. To maintain optimal performance and redundancy, the backend connectivity for DirectFlash Shelves (DFS) must be balanced across the specific PCIe root complexes managed by the dual CPUs.

For a configuration involving multiple shelves (specifically targeting the logical shelf identifiers SH8 and SH9, which often correspond to the first pair of backend loops in an //XL deployment), the validated configuration is to usePCIe Slot 0andPCIe Slot 6. These slots are architecturally designated for the backend NVMe-oF (RoCE) fabric cards.

Using Slot 0 (typically located on the far left) and Slot 6 (located on the right side of the chassis) ensures that the I/O load is distributed across the internal midplane and CPUs correctly. Placing cards in incorrect slots (like Slot 1 or 7, which might be reserved for host I/O or inter-controller links) can result in shelf detection failures or performance bottlenecks where one CPU is overloaded with backend traffic while the other is idle.

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The upgrade from a FlashArray//XR4 to a FlashArray//XL is a specific "Data-in-Place" hardware migration that utilizes thepurewes(Pure Workflow Execution Service) utility to orchestrate complex steps. One of the most critical steps involves stopping the Purity software stack on the controller that is about to be removed (CT0) to ensure a clean failover and data flush to the surviving controller.

The correct command syntax ispurewes controller disable --purity --verify-mode secondary --verify-array ARRAY_NAME ct0.

purewes controller disable: Initiates the shutdown of the controller's services.

--purity: Specifies that the Purity software stack should be stopped (not just the hardware).

--verify-mode secondary: This is a crucial safety check. It ensures the commandonlyexecutes if CT0 is currently the Secondary controller. If CT0 were Primary, running this command without a failover first would cause an outage.

--verify-array: Confirms the action is being taken on the correct target array.

This command sequence ensures the controller is safely quiesced before the Implementation Engineer physically removes it from the chassis.

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Configuring replication involves two distinct steps: setting up the physical network interfaces (IP addresses) and then connecting the arrays (partnerships). The question specifically asks where toconfigure replication IP settings.

In the Purity//FA GUI, the configuration of Ethernet interfaces—regardless of their use for Management, iSCSI, or Replication—is centralized under theSettingstab, specifically within theNetworksub-menu.

Settings > Network: Here, the user selects the Ethernet ports (e.g., eth2, eth3) designated for replication and assigns them IP addresses, netmasks, and gateways (or assigns them to a subnet).

Storage > Array Connections: This is where you use those configured IPs toconnectto a remote array and establish the replication partnership.

Storage > Replication: This tab is used to monitor replication sessions and manage protection groups (snapshots/policies), not to configure the underlying interface IPs.

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After executing the puredb run giveback --safe command during a manual controller upgrade or specific non-disruptive upgrade (NDU) procedure, the Implementation Engineer must wait for10 minutesbefore proceeding to the next step (typically upgrading the peer controller).

The giveback command instructs the recently upgraded controller (e.g., CT0) to resume its primary role and take back ownership of its assigned storage resources and I/O handling from the peer controller. This process triggers a failover event for the host multipathing software.

Path Stabilization:The 10-minute wait time is a critical safety buffer mandated to ensure that all host-side multipathing drivers (MPIO) have successfully recognized the restored paths to the upgraded controller and have stabilized.

Risk Mitigation:Proceeding too quickly—before the hosts have fully settled and paths are marked as "Active/Optimized"—could lead to an "all paths down" (APD) scenario when the second controller is taken offline for its upgrade. This wait time verifies that the upgraded node is fully functional and carrying load, adhering to the strict "availability first" philosophy of FlashArray upgrades.

On theFlashArray//XL, the designated PCIe slots forDirectFlash Shelf (DFS)connectivity areSlot 0 and Slot 6.

The FlashArray//XL features a high-density, high-performance architecture that utilizes100GbE RoCE (RDMA over Converged Ethernet)for backend connectivity to expansion shelves, replacing the SAS protocols used in previous generations.

Slot Assignment:To ensure maximum throughput and redundancy, these backend I/O modules must be balanced across the controller's PCIe bus. The hardware guide and slot map for the //XL explicitly assignSlot 0(typically on the lower riser) andSlot 6(on the upper riser) for the installation of the 2-port 100GbE NVMe-oF cards used to connect DirectFlash Shelves.

Configuration:If a customer orders a FlashArray//XL with external capacity, these cards will be pre-installed or must be seated in these specific slots by the engineer. Using other slots (like 1 or 7, which are often reserved for host I/O or other expansion cards) would result in an invalid configuration or lack of connectivity to the backend storage media.

To properly configure a FlashArray forActiveCluster with Ethernet replication, a total of9 IP addressesare typically required per array. If the installation document currently lists only3 IP addresses, the Implementation Engineer needs6 additional IP addresses.

The breakdown of the requirement is as follows:

Management (5 IPs):Standard ActiveCluster best practices mandate fully redundant management connectivity. This includes 1 Virtual IP (VIP) and 4 Physical IPs (CT0.eth0, CT1.eth0, CT0.eth1, and CT1.eth1). The initial "3 IP addresses" provided usually correspond to the basic setup (VIP, CT0.eth0, CT1.eth0), leaving a deficit of 2 management IPs (for the eth1 redundancy).

Replication (4 IPs):ActiveCluster over Ethernet requires dedicated replication ports separate from management. The standard configuration utilizes two physical ports per controller for redundancy (e.g., CT0.eth2, CT0.eth3, CT1.eth2, CT1.eth3), requiring 4 unique IP addresses.

Therefore, 2 additional management IPs + 4 replication IPs =6 additional IPsrequired to meet the strict redundancy standards for an ActiveCluster deployment.

A valid transfer path forre-using Fibre Channel (FC) cardsduring a controller upgrade includes moving cards from aFlashArray//Mto aFlashArray//XR2 or //XR3.

The FlashArray hardware compatibility matrix supports the migration of specific legacy hardware components to ensure investment protection for customers. The 16Gb Fibre Channel PCIe cards originally deployed in FlashArray//M controllers are physically and electrically compatible with the PCIe risers found in the FlashArray//X R2 and R3 generations.

When performing a "Stateless" upgrade (where the chassis/controllers are replaced but data drives or cards might be retained), the Implementation Engineer can physically transfer these FC HBAs from the retiring //M chassis into the new //X chassis (assuming the target chassis has the appropriate open slots and the cards meet the minimum speed requirements, typically 16Gb or 32Gb). Option B is the most comprehensive correct answer recognized by the exam, confirming that the //M series cards can land in either of the specified //X generations (R2 or R3). Option C is also physically possible but the specific exam context for "reuse" highlights the inter-generational leap from M to X.

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The commandpureboot listis the correct tool to verify which Purity version is designated to load upon the next system reboot.

FlashArray controllers maintain two boot partitions (often referred to as banks) for redundancy and upgrade safety. When an upgrade is performed, the new Purity software image is written to the inactive bank.

Verification:Running pureboot list displays the status of both boot banks (e.g., Primary and Secondary) and explicitly flags which version is "Running" and which is set for "Next Boot."

Why it's critical:Just checking the currently running version (using pureversion or purearray list) is insufficient during an upgrade workflow. An engineer must confirm that the boot pointer has successfully switched to the new versionbeforeissuing the reboot command. If pureboot list shows the old version as "Next Boot," a reboot would simply reload the current code, indicating the upgrade installation failed or wasn't finalized.

TheCustomeris the mandatory party required to provide completion sign-off before the Implementation Engineer leaves the site.

According to the FlashArray Implementation Service Brief and standard operating procedures, the final step of the deployment phase is the "Project Sign-off." After the engineer has racked, cabled, initialized, and verified the array's health (often demonstrating connectivity and the Purity GUI), the customer must formally acknowledge that the installation meets the agreed-upon scope of work. This sign-off serves as the legal and operational acceptance of the hardware and software implementation.

While the Account Team manages the commercial relationship and Support may assist with technical hurdles, neither can validate that the physical implementation meets the customer's specific on-site requirements or that the "handover" of administration has occurred. The customer's signature (physical or digital) on the implementation checklist or service completion form signals the transition from the "Deployment" phase to the "Production/Support" phase.

On aFlashArray//X20 (R2 or R3), the default Fibre Channel configuration is a2-port FC card installed in Slot 2.

The FlashArray//X hardware architecture differentiates slot usage based on the controller model:

Entry Level (X10/X20):These controllers have a limited number of PCIe lanes and slots available for user expansion. Slots 0 and 1 are often utilized by internal system components or reserved. Therefore, the primary Host I/O card (FC or iSCSI) is standardly installed inSlot 2. Additionally, due to the entry-level positioning, the 2-port card is the standard default (though 4-port is supported).

Performance Level (X50/X70/X90):As seen in previous questions, these models prioritizeSlot 0for Host I/O and typically default to4-portcards.

The distinction is critical for Implementation Engineers to ensure they are cabling the correct ports. For an X20, cabling Slot 0 (if a port is even visible) would be incorrect; the active host ports are in Slot 2.